FIG. 1 (Prior Art) is a diagram showing noise in an analog system over a range of frequencies. At low frequencies there is significant noise and at high frequencies there is significant noise. The low frequency noise is sometimes referred to as “one over F” noise, denoted “1/F” noise. As can be seen from FIG. 1, there is an optimum operating frequency band where noise in the system is low. The system will typically be designed to operate in this low noise band.
FIG. 2 (Prior Art) is a diagram of an analog-to-digital (ADC) system. The system includes a sensor 1, a discrete amplifier 2, and a microcontroller integrated circuit 3. The microcontroller integrated circuit 3 includes an analog-to-digital converter (ADC) portion 4 and a digital processor portion 5. The digital processor portion 5 executes instructions stored in a memory. In this example, sensor 1 is a sensor whose output voltage changes slowly over about a three millivolt range. It is desired that the ADC system be able to detect small changes in the signal output by sensor 1. For example, the system is to output a different digital value that corresponds to each 0.003/128 volt change in the voltage signal output by sensor 1.
The ADC 4 of the microcontroller integrated circuit 3 may, for example, be an 11-bit ADC that has one millivolt/LSB sensitivity. One millivolt sensitivity means that the ADC can detect and output a different digital value when its input signal increased by one millivolt. Because the sensitivity of the ADC is one millivolt and because the system is to detect a 0.003/128 volt change in the sensor output voltage, the discrete amplifier in the exemplary system of FIG. 2 has a DC gain of about 43.
The ADC system is a low frequency system in that the sensor reading only needs to be generated a few times a second. The accuracy of each reading is, however, important. The peak-to-peak voltage range of the sensor signal voltage is 3 millivolts. The magnitude of the 1/F drift noise in the system at very low frequencies is approximately 0.5 millivolts. The signal-to-noise ratio at low frequencies is therefore 6. It is difficult to decipher the input signal from the low frequency noise. If, for example, the system is left running for twenty minutes, then the digital values output by ADC 4 will vary due to the 1/F noise. A technique known as chopping is often employed to help reduce the effects of low frequency noise. See, for example, the article entitled “Chopper-Stabilized Sigma-Delta Modulator”, by Y.-H. Chang, et al., Proc. ISCAS, vol. 2, pages 1286-1289 (May 1993).
The system of FIG. 2 employs a chopping technique. Amplifier 2 is a commercially available discrete chopping amplifier integrated circuit. The chopping amplifier integrated circuit receives the voltage signal from sensor 1 via two terminals. On alternating cycles of a chopping clock signal generated within the chopping amplifier integrated circuit, each of the two terminals is coupled to a corresponding one of two input leads of a differential amplifier within the chopping amplifier integrated circuit. On the other cycles of the chopping clock signal, each of the two terminals is coupled to the other of the input leads of the differential amplifier. The coupling between the terminals and the input leads to the differential amplifier is therefore said to be “flipped” on alternating cycles of the chopping clock signal. The signal received from the sensor is said to be “chopped”.
The signal output from the differential amplifier is passed through an inverter. The inverter is controlled to either invert the signal output by the differential amplifier, or to pass the signal output by the differential amplifier in noninverted fashion. On chopping clock signal cycles where the coupling between the input terminals and the input leads of the differential amplifier was flipped, the polarity of the signal output from the differential amplifier is inverted. The inverter is therefore controlled to invert during these chopping clock signal cycles. The output of the inverter is then passed through an analog low pass filter. The resulting output of the discrete chopping amplifier has reduced 1/F noise. Theoretically, the signal output from the discrete chopping amplifier 2 is essentially free of low frequency noise. The signal output from the chopping amplifier can be converted into a digital value by an ADC. It may, for example, be desired to use an ADC of a microcontroller integrated circuit for this purpose as is illustrated in FIG. 2.
FIG. 3 (Prior Art) illustrates a chopping technique in further detail. Sensor 1 is outputting a DC signal voltage represented by the horizontal line 10. The ADC ideally should output a stream of identical digital values corresponding to the DC magnitude of this DC signal. In the example, the physical quantity being detected by the sensor is not changing, so the DC signal output by the sensor is not changing over the twenty minute period illustrated in FIG. 3. In addition to the DC signal voltage of line 10, there is 1/F noise represented by waveform 11. In this example, the magnitude of this noise drifts up and down over the 20-minute time period. The upward pointing vertical arrows at the bottom of the diagram illustrate the times at which the ADC performs analog-to-digital conversions.
FIG. 4 (Prior Art) illustrates the effects of chopping (the flipping of the terminal/input lead coupling). During the first cycle of the chopping clock signal, the two terminals of the chopping amplifier are directly coupled to the corresponding input leads of the differential amplifier. The signal output by the differential amplifier is therefore not inverted. Horizontal line 12 indicates the value that ideally should be output from the differential amplifier. This value corresponds to the DC signal voltage output by the sensor. There is, however, an amount of 1/F noise introduced due to the circuitry of the discrete chopping amplifier and the ADC. This noise adds to the DC signal. Line 13 represents the actual value that is output from the differential amplifier.
During the second cycle of the chopping clock signal, the coupling between the two terminals and the two input leads of the differential amplifier is flipped. The signal output by the differential amplifier is therefore inverted. Line 14 represents the value that should be output from the differential amplifier. This value corresponds to the DC signal voltage output by the sensor, but the value is inverted due to the flipping. There is, however, an amount of 1/F noise. This 1/F noise is a characteristic of the circuitry of the discrete chopping amplifier and the ADC. The 1/F noise therefore is not inverted due to the flipping. This noise, which is not inverted, adds to the inverted DC signal voltage. Line 15 illustrates the actual value that is output from the differential amplifier.
FIG. 5 (Prior Art) illustrates a next step in the chopping technique. On cycles of the chopping clock signal when the terminal/input lead coupling is flipped, the signal output from the differential amplifier is inverted. On cycles of the chopping clock signal when the terminal/input lead coupling is not flipped, then the signal output from the differential amplifier is not inverted. The result of this inverting process is illustrated in FIG. 5 as a waveform involving a sequence of levels 16-26.
FIG. 6 (Prior Art) illustrates a next step in the chopping technique. The waveform of levels 16-26 of FIG. 5 is passed through a low pass filter. The output of the low pass filter is represented by dashed waveform 27. It is seen that the magnitude of drift noise about the expected signal value represented by horizontal line 10 is much less than the magnitude of 1/F noise represented by waveform 11.
FIGS. 7-10 (Prior Art) are diagrams that illustrate operation of the chopping process in the frequency domain. FIG. 7 (Prior Art) illustrates the 1/F noise 11 and the frequency spectrum 28 of the sensor input signal at the beginning of the chopping process. The 1/F noise is at the approximate frequency of the sensor signal to be detected.
FIG. 8 (Prior Art) shows the result of chopping at the chopping frequency. The chopping frequency may, for example, be one gigahertz. The spectrum 29 of the transposed input signal is centered at the chopping frequency. The 1/F noise, however, is not transposed.
FIG. 9 (Prior Art) illustrates the result of the inverting process. The input signal is transposed back down to zero frequency and is represented by spectrum line 28. The 1/F noise is, however, transposed up to the inverting frequency (the chopping frequency). This transposed noise is illustrated by dashed line 30.
FIG. 10 (Prior Art) illustrates the result of the low pass filtering. Line 31 illustrates the frequency response of the low pass filter. The low pass filter has removed the transposed low frequency noise of line 30 of FIG. 9. At zero frequency (DC), there is no 1/F noise. The result in this ideal example is the input signal. The spectrum of the input signal is represented by line 28.
The system of FIG. 2 involves a discrete chopping amplifier integrated circuit and a microcontroller integrated circuit. The discrete chopping amplifier is expensive, takes up printed circuit board space, and consumes power. A straightforward attempt to integrate the electronics of the chopping amplifier into the microcontroller integrated circuit, however, results in decreased performance. When the input terminals of the chopping amplifier are coupled to a DC voltage source, the actual ADC output values change as if the input to the ADC changed over about a 4.0 millivolt range, and if special shielding techniques are used the change is as if the input to the ADC changed over a 0.4 millivolt range. Where the system is to detect 23 microvolt steps in the signal output by sensor 1, performance of the integrated system is so bad (the signal-to-noise ratio is approximately ten) that it is difficult to detect the low amplitude sensor signal of FIG. 2 to the resolution required. This is a problem.